USB Max BW

I saw a request to increase the SSB BW to 10 KHz. If that is to be entertained, why not make it 50 KHz which would accommodate the 24 KHz data in the latest MIL110 spec and the 48 under development 

Comments

  • jksjks
    edited January 2017
    I need to add this question to the FAQ. But basically the current bandwidth (9.6 kHz) times the number of channels maxes out a number of different resources (FPGA memory, SPI bandwidth, Beagle processing power, audio lag etc.) You could increase it to 50 kHz but then you'd probably only get one channel instead of 4. The Kiwi is a very careful balance between cost, performance and capability.

    Now it's always possible that more clever programming and FPGA firmware could do a better job. Just yesterday I was experimenting with a change to reduce the FPGA memory used by the waterfall(s) by 25% since that is the biggest consumer of FPGA memory blocks. It worked, but raised the noise floor to an unacceptable degree. It took me a while to understand why.


    WA2ZKD
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