External ADC clock input (J5 connector pad)
I've extracted Rob's comment below from the end of an old thread and started this new thread with a more appropriate title to assist people interested in the topic.
I am in discussions about deploying a bank of Kiwis at a major receive site, so it would be perfect if I could daisy-chain the clock from one Kiwi to the next.
I think I can handle the HW mod, but what is needed in SW and FW?
There is a software switch now which enables the external ADC clock input (J5 pad). But it can only be used if you're running the server manually from the Linux shell. I just need to add a control to the admin interface that does the same thing.
If there is no ADC clock the Kiwi will still function. You can still connect to the admin and user interfaces. You just won't get any audio and waterfall. Even the GPS still works. This happens because the e_cpu of the FPGA runs off the 16 MHz GPS clock and not the 66.7 MHz ADC clock (see the clock domain diagram in the design document).
I think instead of daisy-chaining the clock I would look into an inexpensive, multiple-output distribution amp between the clock source and the Kiwis. Cheap CCTV video distribution boxes can be effective in this application.
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